Modern microprocessors. Coursework: Microprocessor Manufacturing Stages Microprocessor Manufacturing Technology

As promised - a detailed story about how processors are made ... starting with the sand. Everything you wanted to know, but were afraid to ask)

I have already talked about " Where are processors made?"And what" Production difficulties"Stand on this path. Today we will talk directly about the production itself - "inside and out".

Processor manufacturing

When the factory for the production of processors using the new technology is built, it has 4 years to recoup the investment (more than $ 5 billion) and make a profit. From simple secret calculations, it turns out that the factory must produce at least 100 working plates per hour.

In short, the process of manufacturing a processor looks like this: a single crystal of a cylindrical shape is grown from molten silicon on special equipment. The resulting ingot is cooled and cut into "pancakes", the surface of which is carefully leveled and polished to a mirror finish. Then, in the "clean rooms" of semiconductor factories, integrated circuits are created on silicon wafers by photolithography and etching. After re-cleaning the plates, laboratory specialists under a microscope perform selective testing of the processors - if everything is OK, then the finished plates are cut into separate processors, which are later enclosed in housings.

Chemistry lessons

Let's take a closer look at the whole process. The content of silicon in the earth's crust is about 25-30% by mass, due to which this element takes the second place after oxygen in terms of prevalence. Sand, especially quartz sand, has a high percentage of silicon in the form of silicon dioxide (SiO 2) and at the beginning of the production process is the basic component for creating semiconductors.

Initially, SiO 2 is taken in the form of sand, which is reduced with coke in arc furnaces (at a temperature of about 1800 ° C):

Such silicon is called " technical"And has a purity of 98-99.9%. Processors require much cleaner raw materials called " electronic silicon"- this should contain no more than one foreign atom per billion silicon atoms. To purify to this level, silicon is literally "reborn". By chlorination of commercial silicon, silicon tetrachloride (SiCl 4) is obtained, which is further converted into trichlorosilane (SiHCl 3):
These reactions using the recycling of the formed by-product silicon-containing substances reduce the cost and eliminate environmental problems:

2SiHCl 3 SiH 2 Cl 2 + SiCl 4
2SiH 2 Cl 2 SiH 3 Cl + SiHCl 3
2SiH 3 Cl SiH 4 + SiH 2 Cl 2
SiH 4 Si + 2H 2

The resulting hydrogen can be used in many places, but the most important thing is that "electronic" silicon was obtained, pure-pure (99.9999999%). A little later, a seed ("growth point") is dropped into the melt of such silicon, which is gradually pulled out of the crucible. As a result, the so-called "boule" is formed - a single crystal the height of an adult. The weight is appropriate - in production, such a barrel weighs about 100 kg.

The ingot is skinned with "zero" :) and cut with a diamond saw. At the exit - wafers (codenamed "waffle") with a thickness of about 1 mm and a diameter of 300 mm (~ 12 inches; these are the very ones used for the 32nm process technology with HKMG, High-K / Metal Gate technology). Once upon a time Intel used discs with a diameter of 50mm (2 "), and in the near future it is already planned to switch to plates with a diameter of 450mm - this is justified at least from the point of view of reducing the cost of manufacturing chips. Speaking of savings, all these crystals are grown outside of Intel; they are purchased elsewhere for processor manufacturing.

Each plate is polished, made perfectly flat, bringing its surface to a mirror-like shine.

Chip production consists of more than three hundred operations, as a result of which more than 20 layers form a complex three-dimensional structure - the volume of the article available on Habré will not allow us to briefly describe even half of this list :) Therefore, very briefly and only about the most important stages.

So. It is necessary to transfer the structure of the future processor to the polished silicon wafers, that is, to introduce impurities into certain areas of the silicon wafer, which ultimately form the transistors. How to do it? In general, applying different layers on a processor substrate is a whole science, because even in theory such a process is not easy (not to mention practice, taking into account the scale) ... but it's so nice to understand the complex;) Well, or at least try to figure it out.

Photolithography

The problem is solved with the help of photolithography technology - the process of selective etching of the surface layer using a protective photomask. The technology is built on the principle of "light-template-photoresist" and proceeds as follows:

- A layer of material is applied to the silicon substrate, from which the pattern is to be formed. It is applied photoresist- a layer of polymer photosensitive material that changes its physicochemical properties when irradiated with light.
- Manufactured exhibiting(illumination of the photo layer for a precisely set period of time) through a photomask
- Removal of used photoresist.

The required structure is drawn on a photomask - as a rule, it is a plate made of optical glass, on which opaque areas are photographed. Each such template contains one of the layers of the future processor, so it must be very accurate and practical.

Sometimes it is simply impossible to deposit certain materials in the right places on the plate, so it is much easier to apply the material at once to the entire surface, removing the excess from those places where it is not needed - the image above shows the application of the photoresist in blue.

The plate is irradiated with a flow of ions (positively or negatively charged atoms), which penetrate under the surface of the plate at specified places and change the conducting properties of silicon (green areas are embedded foreign atoms).

How to isolate areas that do not require post-treatment? Before lithography, the surface of the silicon wafer (at a high temperature in a special chamber) is applied protective film dielectric - as I already said, instead of traditional silicon dioxide, Intel began to use a High-K dielectric. It is thicker than silicon dioxide, but at the same time it has the same capacitive properties. Moreover, due to the increase in thickness, the leakage current through the dielectric is reduced, and as a result, it became possible to obtain more energy efficient processors. In general, it is much more difficult here to ensure the uniformity of this film over the entire surface of the plate - in this regard, high-precision temperature control is used in production.

So that's it. In those places that will be treated with impurities, a protective film is not needed - it is carefully removed by etching (removing areas of the layer to form a multilayer structure with certain properties). And how to remove it not everywhere, but only in the necessary areas? For this, one more layer of photoresist must be applied on top of the film - due to the centrifugal force of the rotating plate, it is applied in a very thin layer.

In photography, light passed through negative film, hit the surface of the photographic paper, and changed its chemical properties. In photolithography, the principle is similar: light is passed through a photomask onto a photoresist, and in those places where it passed through the mask, individual areas of the photoresist change properties. Light radiation is transmitted through the masks and is focused on the substrate. For accurate focusing, a special system of lenses or mirrors is required that can not only reduce the image cut on the mask to the size of a chip, but also accurately project it onto the workpiece. The printed plates are typically four times smaller than the masks themselves.

All the spent photoresist (which has changed its solubility under the action of radiation) is removed with a special chemical solution - together with it, part of the substrate under the illuminated photoresist dissolves. The part of the substrate that was hidden from the light by the mask will not dissolve. It forms a conductor or a future active element - the result of this approach is different patterns of short circuits on each layer of the microprocessor.

As a matter of fact, all the previous steps were necessary in order to create semiconductor structures in the necessary places by introducing a donor (n-type) or acceptor (p-type) impurity. Suppose we need to make a p-type carrier concentration region in silicon, that is, a hole conduction band. For this, the plate is processed using a device called implanter- boron ions with enormous energy are fired from the high-voltage accelerator and are evenly distributed in the unprotected zones formed by photolithography.

Where the dielectric has been removed, the ions penetrate into the unprotected silicon layer - otherwise, they "get stuck" in the dielectric. After the next etching process, the remnants of the dielectric are removed, and zones remain on the plate in which boron is locally present. It is clear that modern processors can have several such layers - in this case, a dielectric layer is again grown in the resulting figure and then everything goes along a trodden path - another layer of photoresist, the photolithography process (already using a new mask), etching, implantation ... well, you understood.

The characteristic size of the transistor is now 32 nm, and the wavelength that silicon is processed with is not even ordinary light, but a special ultraviolet excimer laser - 193 nm. However, the laws of optics do not allow resolving two objects located at a distance of less than half the wavelength. This is due to light diffraction. How to be? To use various tricks - for example, in addition to the aforementioned excimer lasers, which shine far in the ultraviolet spectrum, modern photolithography uses multilayer reflective optics using special masks and a special immersion (immersion) photolithography process.

Logic elements that are formed in the process of photolithography must be connected to each other. To do this, the plates are placed in a solution of copper sulfate, in which, under the action of an electric current, metal atoms "settle" in the remaining "passages" - as a result of this galvanic process, conducting regions are formed that create connections between individual parts of the processor "logic". Excess conductive coating is removed by polishing.

Home stretch

Hurray - the hardest part is behind. It remains a tricky way to connect the "remnants" of the transistors - the principle and sequence of all these connections (buses) is called the processor architecture. These connections are different for each processor - although the circuits seem completely flat, in some cases up to 30 levels of such "wires" can be used. From a distance (at a very high magnification), it all looks like a futuristic road junction - and after all, someone is designing these tangles!

When the processing of the wafers is complete, the wafers are transferred from production to the assembly and testing workshop. There, the crystals undergo the first tests, and those that pass the test (and this is the overwhelming majority) are cut from the substrate by a special device.

At the next stage, the processor is packed into a substrate (in the figure, an Intel Core i5 processor, consisting of a CPU and an HD graphics chip).

Hello socket!

The substrate, die and heat-transfer cover are connected together - this is the product we will mean when we say the word "processor". The green substrate creates an electrical and mechanical interface (gold is used to electrically connect the silicon microcircuit to the case), thanks to which it will be possible to install the processor in a motherboard socket - in fact, this is just a platform on which the contacts from the small chip are wired. The heat-distributing cover is a thermal interface that cools the processor during operation - it is to this cover that the cooling system will adjoin, be it a cooler radiator or a healthy water block.

Socket(central processor connector) - a socket or slot connector designed for installing a central processor. Using a connector instead of directly unsoldering the processor on the motherboard makes it easier to replace the processor to upgrade or repair your computer. The connector can be designed to install the actual processor or CPU card (for example, in Pegasos). Each slot allows the installation of only a certain type of processor or CPU card.

At the final stage of production, the finished processors undergo final tests for compliance with the main characteristics - if everything is in order, then the processors are sorted in the right order into special trays - in this form, the processors will go to manufacturers or go to OEM sales. Another batch will go on sale in the form of BOX versions - in a beautiful box along with a stock cooling system.

The end

Now imagine that the company is announcing, for example, 20 new processors. They are all different from each other - the number of cores, cache sizes, supported technologies ... Each processor model uses a certain number of transistors (calculated in millions and even billions), its own principle of connecting elements ... And all this must be designed and created / automated - templates, lenses, lithography, hundreds of parameters for each process, testing ... And all this should work around the clock, at several factories at once ... As a result, devices should appear that have no room for error in operation ... And the cost of these technological masterpieces should be within the bounds of decency ... I'm almost sure in the fact that you, like me, also cannot imagine the entire volume of work being done, which I tried to tell you about today.

Well, and something more surprising. Imagine that you are a great scientist at five minutes before - you carefully removed the heat-distributing cover of the processor and through a huge microscope you could see the structure of the processor - all these connections, transistors ... even sketched something on a piece of paper so as not to forget. Do you think it is easy to study the principles of the processor, having only this data and data about what tasks can be solved with the help of this processor? It seems to me that approximately the same picture is now visible to scientists who are trying to study the work of the human brain at a similar level. Only if you believe Stanford microbiologists, in one human brain

Recently, at the Moscow Polytechnic Museum, the computer technology stand was seriously updated - Intel placed its stand there, which was named " From sand to cpu"From now on, this stand will become an integral part of school trips, but I advise even adults not to postpone visiting the institution for more than five years - by 2016 Intel plans to seriously" upgrade "the museum so that it can enter the top ten science museums in the world!

A series of lectures of the same name in three parts was timed to this event. Two lectures have already passed - you can find their content under the cut. Well, if you are interested in all this, then you will still have time to attend the third lecture, information about which is at the end of the post.

I am not ashamed to admit that most of this text is indeed a synopsis of the first lecture that Nikolay Suetin, director of external projects in the field of research and development Intel in Russia. For the most part, it was about modern semiconductor technologies and the problems they face.

I propose to start reading interesting things, and we will start with the very basics.

CPU

Technically, a modern microprocessor is made in the form of a single ultra-large-scale integrated circuit, consisting of several billion elements - this is one of the most complex structures created by man. The key elements of any microprocessor are discrete switches - transistors. By blocking and passing an electric current (on-off), they enable the computer's logic circuits to work in two states, that is, in a binary system. Transistors are measured in nanometers. One nanometer (nm) is one billionth (10-9) of a meter.
Most of the work in creating processors is done not by people at all, but by robotic mechanisms - it is they who carry silicon wafers back and forth. The production cycle for each plate can be up to 2-3 months.

In more detail (and visually) about the technology of production of processors, I will tell you, but for now, quite briefly.

The plates are actually made of sand - silicon is second only to oxygen in terms of abundance in the earth's crust. Through chemical reactions, silicon oxide (SiO 2) is thoroughly purified, making “dirty” pure. For microelectronics, monocrystalline silicon is needed - it is obtained from a melt. It all starts with a small crystal (which is lowered into the melt) - later it turns into a special monocrystalline "boule" as tall as a human. Further, the main defects are removed and the boule is cut into discs with special threads (with diamond powder) - each disc is carefully processed to an absolutely even and smooth (at the atomic level) surface. The thickness of each plate is about 1mm - solely so that it does not break or bend, that is, so that you can work comfortably with it.

The diameter of each plate is exactly 300mm - a little later, hundreds or even thousands of processors will "grow" on this area. By the way, Intel, Samsung, Toshiba and TSMC have already announced that they are developing equipment capable of working with 450mm plates (more processors will fit in a larger area, and therefore the price of each will be lower) - the transition to them is planned already by 2012 year.

Here is a cross-sectional image of the processor:

Above there is a protective metal cover, which, in addition to the protective function, also acts as a heat spreader - it is this that we liberally smear with thermal paste when we install the cooler. Under the heat spreader is the same piece of silicon that performs all the user's tasks. Even lower - a special substrate, which is needed for pinout (and to increase the area of ​​the "legs") so that the processor can be installed in a motherboard socket.

The chip itself consists of silicon, on which there are up to 9 metallization layers (made of copper) - just so many levels are needed so that, according to a certain law, it is possible to connect transistors located on the silicon surface (since it is simply impossible to do all this at the same level). Basically, these layers act as connecting wires, only on a much smaller scale; so that the "wires" do not short-circuit each other, they are separated by a layer of oxide (with a low dielectric constant).

As I wrote above, the elementary cell of the processor is a field-effect transistor. The first semiconductor products were made from germanium and the first transistors were made from germanium. But as soon as they began to make field-effect transistors (under the gate of which there is a special insulating layer - a thin dielectric film that controls the "on" and "off" of the transistor), germanium immediately "died out", giving way to silicon. For the past 40 years, silicon dioxide (SiO 2) has been used as the main material for the gate dielectric, which was due to its manufacturability and the possibility of a systematic improvement in the characteristics of transistors as their size decreases.

The scaling rule is simple - by reducing the size of the transistor, the thickness of the dielectric must decrease proportionally. So, for example, in chips with a technical process of 65 nm, the thickness of the SiO2 gate dielectric layer was about 1.2 nm, which is equivalent to five atomic layers. In fact, this is a physical limit for this material, since as a result of a further decrease in the transistor itself (and hence a decrease in the silicon dioxide layer), the leakage current through the gate dielectric increases significantly, which leads to significant current losses and excessive heat release. In this case, the silicon dioxide layer ceases to be an obstacle to the quantum tunneling of electrons, which makes it impossible to ensure control over the state of the transistor. Accordingly, even with the ideal manufacture of all transistors (the number of which in a modern processor reaches several billion), the incorrect operation of at least one of them means wrong job all the logic of the processor, which can easily lead to disaster - this is when you consider that microprocessors control the operation of almost all digital devices (from modern cell phones to fuel systems in cars).

The process of miniaturization of transistors did not go contrary to the laws of physics, but computer progress, as we can see, did not stop. This means that the problem with the dielectric was somehow solved. And they really decided - when switching to 45nm, Intel began to use a new material, the so-called high-k dielectric, which replaced the hopelessly thin layer of silicon dioxide. The layer based on the oxide of the rare earth metal hafnium with a high (20 versus 4 for SiO2) dielectric constant k (high-k) became thicker, but this made it possible to reduce the leakage current by more than ten times, while retaining the ability to correctly and stably control the operation of the transistor. The new dielectric turned out to be poorly compatible with the polysilicon gate, but this did not become an obstacle - to increase the speed, the gate in the new transistors was made of metal.

Thus, Intel became the first company in the world to move to the mass production of microprocessors using hafnium. Moreover, the crown still belongs to the corporation - until now no one can reproduce this technology, because a dielectric film is created by atomic deposition, and the material is deposited in successive layers only one atom thick.
Interestingly, after reading these paragraphs, you got the idea of ​​how billions of transistors are designed, made and fit in such a small area? And how does it all work in the end and, at the same time, it costs quite reasonable money? I became very thoughtful, although earlier I considered all this obvious and I even had the conscience to think “ Hey, why is it so expensive? For one processor only!»:)

In 1965, one of the founders of Intel Corporation, Gordon Moore, recorded an empirical observation that later became the famous law of his name. Having presented in the form of a graph the increase in the performance of memory microcircuits, he discovered an interesting regularity: new models of microcircuits were developed after equal intervals of time - about 18-24 months - after the appearance of their predecessors, and the capacity of microcircuits at the same time increased approximately twice each time.

Later, Gordon Moore predicted a pattern, suggesting that the number of transistors in microprocessors would double every two years - in fact, by constantly creating innovative technologies, Intel Corporation has been enforcing Moore's Law for more than 40 years.

The number of transistors continues to grow, although the size of the output processor remains relatively unchanged. Again, there is no secret - it becomes clear if you look at the following dependence.

As you can see, every two years the topological dimensions are reduced by 0.7 times. As a result of reducing the size of transistors, their switching speed is higher, the price is lower and the power consumption is less.

On this moment Intel manufactures 32nm processors. Key technical differences from 45nm technology:
- 9 levels of metallization are used
- a new generation high-k dielectric is used (also hafnium oxide, but with special additives - the resulting layer is equivalent to 0.9 nm silicon oxide)

The creation of a new technological process for creating a metal gate led to a 22% increase in the performance of all transistors (compared to 45nm), as well as to the highest density of elements, which required the highest current density.

Production

Intel manufactures processors in three countries - the United States, Israel and Ireland. At the moment, the company has 4 factories for mass production of processors using 32nm technology. It: D1D and D1C in Oregon, Fab 32 in Arizona and Fab 11X in New Mexico. There are many interesting things in the structure of these factories and in their work, but I will tell you about this next time.

The cost of such a plant is about $ 5 billion, and if you build several plants at once, then the amount of investment can be safely multiplied. Considering that technology is changed every two years, it turns out that the plant has exactly 4 years to “recoup” the $ 5 billion invested in it and make a profit. From which the obvious conclusion suggests itself - the economy very much dictates the development of technical progress ... but, despite all these huge numbers, the cost of producing one transistor continues to fall - now it is less than one billion dollars.

Do not think that with the transition of several factories to 32nm, everything will suddenly begin to be produced according to this process technology - the same chipsets and other peripheral circuits simply do not need this - in most cases they use 45nm. The 22nm cutoff is planned to be fully taken next year, and by 2013 there will most likely be 16nm. At least this year, a test plate (at 22nm) has already been made, on which the operability of all the elements necessary for the processor's operation was demonstrated.

* UPD from * The need to reduce the thickness of the gate dielectric is dictated by a simple formula for a flat capacitor:

The gate area of ​​the transistor decreases, and for the transistor to work, the capacity of the gate dielectric must be maintained.
Therefore, it was necessary to reduce its thickness, and when it became impossible, a material with a higher dielectric constant was found.

When will the era of silicon end? The exact date is still unknown, but it is definitely not far off. In 22nm technology it will definitely "fight", most likely it will remain in 16nm ... but then the most interesting part will begin. The periodic table, in principle, is large enough and there is plenty to choose from) But most likely, everything will rest not only on chemistry. Increasing the efficiency of the processor can be achieved either by reducing the topological dimensions (they are doing this now), or by using other compounds with higher carrier mobility - perhaps gallium arsenide, possibly "sensational" and promising graphene (by the way, its mobility is hundreds of times higher than silicon). But there are problems here too. Now technologies are designed for processing plates with a diameter of 300 mm - the amount of gallium arsenide required for such a plate simply does not exist in nature, and graphene (Word persistently suggests writing "decanter") of this size is still extremely difficult to make - they learned how to do it, but there are many defects, problems reproduction, alloying, etc.

Most likely, the next step will be the deposition of monocrystalline gallium arsenide on silicon, and then graphene. And, perhaps, the development of microelectronics will go not only along the path of improving technologies, but also along the path of developing a fundamentally new logic - this, too, cannot be ruled out. Shall we place our bets, gentlemen? ;)

In general, now there is a struggle for technology and high mobility. But one thing is clear - there are no reasons to stop progress.

Tick ​​tock

The manufacturing process for processors consists of two large "parts". For the first, you need to have the manufacturing technology itself, and for the second, you need to understand WHAT to manufacture and how - the architecture (how the transistors are connected). If both a new architecture and a new technology are made at the same time, then in case of failure it will be difficult to find the “guilty” - some will say that the “architects” are to blame, others that the technologists are to blame. In general, following such a strategy is very short-sighted.

At Intel, the introduction of a new technology and architecture is spaced apart in time - a technology is introduced in one year (and an already developed architecture is produced using a new technology - if something goes "wrong", then the technologists will be to blame); and when the new technology is worked out, the architects will make a new architecture for it, and if something does not work on the worked out technology, then the architects will be to blame. This strategy was called "Tick-tock".
More clearly:

With the current pace of technology development, a fantastic amount of investment in research and development is required - every year Intel invests $ 4-5 billion in this business. Some of the work takes place within the company, but a lot - outside of it. Just keep a whole laboratory in the company like Bell labs(the forge of Nobel laureates) in our time is almost impossible.
As a rule, the first ideas are laid in universities - in order for universities to know what exactly makes sense to work on (what technologies are in demand and what will be relevant), all "semiconductor companies" were united into a consortium. After that, they provide a kind of roadmap - it talks about all the problems that the semiconductor industry will face in the next 3-5-7 years. In theory, any company has the right to literally go to the university and "take advantage" of this or that innovative development, but the rights to them, as a rule, remain with the developer university - this approach is called "open innovation". Intel is no exception and periodically listens to the ideas of students - after defense, selection at an engineering level and testing in real conditions, the idea has every chance to become new technology.

Here is a list of research centers around the world that Intel works with (excluding universities):

An increase in productivity leads to a rise in the cost of factories, and this in turn leads to natural selection. So, for example, to pay for itself in 4 years, each Intel factory must produce at least 100 working plates per hour. There are thousands of chips on each plate ... and if you do some calculations, it becomes clear - if Intel had not had 80% of the world processor market, the company simply would not have been able to recoup the costs. Conclusion - it is quite expensive to have your own "design" and your own production nowadays - at least you need to have a huge market. The result of natural selection can be seen below - as you can see, fewer and fewer companies are marching in step with technological progress with their "design" and production. Everyone else had to switch to fabless mode - for example, neither Apple, nor NVIDIA, nor even AMD have their own factories and have to use the services of other companies.

Apart from Intel, only two companies around the world are potentially ready for 22nm technology - Samsung and TSMC, which invested more than $ 1 billion in their factories last year. Moreover, TSMC does not have its own design division (only foundry) - in fact, it is just a high-tech forge that accepts orders from other companies and often does not even know what it is forging.

As you can see, natural selection passed quickly enough - in just 3 years. From this, two conclusions can be drawn. The first is that it is unlikely that it will be possible to become an industry leader without your own factory; the second - in fact, you can succeed without your own factory. Enough by and large good computer, brains and the ability to "draw" - the threshold for entering the market has dropped dramatically and it is for this reason that a lot of "startups" have appeared. Someone comes up with a certain scheme for which there is or is artificially created a certain market - novice manufacturers rise ... PROFIT! But the threshold to the foundry market has risen strongly and will only grow further ...

What else has changed in recent years? If you recall, until 2004, the statement “the higher the processor frequency, the better” was quite true. Starting from 2004-2005, the frequency of processors almost stopped growing, which is associated with reaching some kind of physical limitations. Nowadays, performance can be increased by multicore - performing tasks in parallel. But making many cores on a single chip is not a big problem - it is much more difficult to get them to work correctly under load. As a result, from that moment on, the role of software has dramatically increased and the importance of the “programmer” profession will only gain momentum in the near future.

In general, summing up the above:
- Moore's Law continues to operate
- The rise in the cost of developing new technologies and materials, as well as the cost of maintaining factories are growing
- Productivity is also increasing. Expected jump when going to 450mm inserts

As a result:
- Division of companies into "fabless" and "foundry"
- Outsource main R&D
- Differentiation through software development

The end

Was it interesting to read? Hope. At the very least, it was interesting for me to write all this and it was even more interesting to listen to it ... although at first I also thought, "What will they tell at this lecture."

Last week, the second lecture was held at the Moscow Polytechnic Museum, which

Big things start small. This statement is true for many things, but this article will talk about the manufacture of microprocessors, which are stuffed with a variety of household appliances that surround you, from smartphones to refrigerators.

Preparation of raw materials

Computer chips of the most complex structure, capable of performing instant calculations, are born in huge crucibles made of quartz glass, filled to the brim with sand that has undergone multi-stage cleaning.

First of all, "technical" silicon is obtained from sand collected in some quarry by adding carbon to the mineral at a high temperature. The resulting silicon reaches 98% purity, but is still completely unsuitable for use in the electronics industry and requires additional chlorine treatment to become "electronic silicon". In the course of a cascade of chemical reactions with chlorine, silicon is literally synthesized anew, getting rid of the last signs of impurities.

Only then is the crucible with the purest electronic silicon placed in a sealed furnace filled with argon. Of course, it would be possible to evacuate air from it, but creating an ideal vacuum on earth is very difficult, if not impossible, and from a chemical point of view, argon gives practically the same effect. This inert gas replaces oxygen, protecting the composition from oxidation, and itself does not react in any way with silicon in the crucible.

Only after that, the former sand heats up to 1420 degrees Celsius, which is only 6 degrees above its melting point. For this, a graphite heater is used. The choice of material, as in the case of the crucible quartz, is due to the fact that graphite does not react with silicon and, therefore, cannot contaminate the material of the future processor.

A thin seed crystal of silicon, the size and shape of a pencil, is dropped into the heated crucible. He must start the crystallization process. The rest can be reproduced at home with a solution of salt, sugar, citric acid or, for example, copper sulfate. The cooling solution begins to crystallize around the seed point, forming an ideal molecular lattice. This is how salt crystals are grown, and this is how silicon grows.

The silicon seed crystal is gradually lifted out of the crucible at a speed of about one and a half millimeters per minute, and with it the growing single crystal rises from the solution. Crystal growth is slow and takes an average of 26 hours per crucible, so the production runs around the clock.

During this time, a "boule" is formed - a solid cylindrical crystal 300 millimeters in diameter, up to 1-2 meters long and weighing about 100 kilograms. If you look at it under a strong magnification, you will see a strict structure - an ideal crystal lattice of silicon atoms, completely uniform throughout the entire volume.

The crystal is so strong that its weight can withstand a thread with a diameter of only 3 millimeters. So, the finished blank for the processors is pulled out of the crucible by the same seed crystal.

However, the "boule" is handled more carefully than with an antique vase, the crystal can withstand enormous tensile stress, but is extremely fragile.

After chemical and fluoroscopic examination to check the purity of the crystal and the correctness of the molecular lattice, the workpiece is placed in a silicon cutting machine. She slices the crystal into wafers about 1 millimeter thick using a diamond-coated wire saw.

Of course, it is not complete without damage. No matter how sharp the saw, after cutting, microscopic defects remain on the surface of the plates. So the slicing is followed by the polishing step.

But even after being processed in a powerful grinding machine, the silicon wafers are still not smooth enough to be used for the production of microchips. Therefore, the polishing is repeated over and over again using chemical reagents.

The result is a surface in comparison to which the mirror resembles coarse sandpaper. Such a plate without breaks and microdefects becomes the basis for millions of microelectronic devices that form a microcircuit. Dust-free, silicon discs, which are commonly called "wafer" or "waffle" in sealed containers, are sent to the clean room.

In a clean room

In 1958, the inventor of the integrated circuit, Jack Kirby, made a breakthrough by placing one transistor on his circuit. Nowadays, the number of logical elements of a microprocessor has exceeded one billion and continues to double every two years in accordance with Moore's Law.

Working with such microscopic parts poses a serious challenge for chip manufacturers, since even a single speck of dust can ruin a future product. Therefore, a workshop with an area of ​​a couple of thousand square meters, completely isolated from the outside world, equipped with the most sophisticated air purification and air conditioning systems, making it 10,000 times cleaner than in a surgical ward.

All specialists working in such a clean room not only maintain sterility, but also wear protective suits made of antistatic materials, masks, gloves. And yet, despite all the precautions to reduce the risk of rejects, processor companies are trying to automate as much of the operations performed in the cleanroom as they can by placing them on industrial robots.

The process of manufacturing processors is put on the conveyor belt. Delivered in a sealed box, a perfectly flat "wafer" passes through 400-500 technological operations and leaves the shop only a few months later in the form of a finished microchip.

The creation of a microchip from a "wafer" implies the construction of a very complex technological chain, which cannot be described in detail due to the limitations on the volume of the article. Even if they weren't there, companies like Intel and AMD are in no hurry to share production secrets. In the design departments of the companies, the most complex three-dimensional schemes of the mutual arrangement of processor elements - the topology of microcircuits - are designed. They represent a multi-level pile of elements, which is divided into layers and deposited layer-by-layer on a silicon substrate. It is, of course, impossible to do it by hand, too delicate process, too small elements, literally nanometer in size.

Intel's eighth generation processors, known as Coffee Lake, are dotted with 14 nanometer transistors, AMD has announced the second generation of AMD Ryzen processors, codenamed Pinnacle Ridge, built on 12 nanometer cells. Newest NVIDIA graphics cards with the architecture of the Volta cores are also built using 12 nanometer technology. The system on the Qualcomm Snapdragon 835 chip is even smaller - only 10 nanometers. Constantly reducing the size of the functional elements of the processor and, consequently, increasing its performance, is possible thanks to the improvement of technology called photolithography.

In general terms, this process can be described as follows:

First, the silicon wafer is covered with a base - a material that will have to become part of the future scheme, then a chemical reagent sensitive to light is applied on top of a uniform layer. This lineup will do all the work, but the point is later.

Previously, a highly secret detailed diagram of the processor is retrieved from corporate archives. Its lower layer is presented in the form of a negative and transferred to a photomask - a protective plate that acts like a stencil. It is significantly larger than the chip, so that the light passing through it is focused using a complex lens system, reducing the projected image to the desired size.

In those places where the light does not reach the silicon, the plate remains intact; in the illuminated, it initiates a reaction in a chemical reagent that changes its properties. Then the future processor will be treated with another compound, and these areas will dissolve, leaving only those areas that were not exposed. They also form the conductive logic elements of the processor.

Then a dielectric layer is applied to the plate and new processor components are added on top, again using photolithography.

Some layers are heated, some are exposed to ionized plasmas, and others are covered with metal. Each type of processing changes the properties of the layer and slowly creates a piece of the puzzle that forms a particular chip model. The result is a kind of layered cake, where each layer has its own functionality and they are interconnected in a complex way by means of "tracks" of copper atoms, which are deposited on a silicon substrate from a solution of copper sulfate, passing an electric current through it.

This is the final stage of processing, after which the microchips are checked for operability. Despite all the precautions and many days of effort, the rejection rate remains high. The robots will select and cut only 100% workable chips from the silicon wafer.
They will be sorted by energy efficiency, currents, and maximum operating frequencies, assigned different designations, and ultimately sold at different prices.

Finishing touches

On their way to customers, the processors leave the cleanroom and go to the assembly line, where the finished microcircuit is glued onto a square called a substrate. The crystal is soldered with it in a special oven at a temperature of 360 degrees Celsius.

Then the chip is covered with a lid. It serves both to protect the still fragile silicon from damage and to remove heat from it. You probably have a good idea of ​​it, the base of the cooling system will be pressed against the lid, be it a cooler or a heat exchanger of a CBO (water cooling system). This is no less important stage than the previous one. Indeed, the stability and speed of its operation, its future maximum performance largely depends on how well the processor cover removes heat from the crystal.

Old Intel processors literally soldered to the heat distribution covers. However, the latest generations of proprietary chips receive a thermal interface between the crystal and the lid and are cooled worse, which is very disappointing for computer hardware enthusiasts who want to squeeze the maximum out of their purchases. It got to the point that they "scalp" the processors - they independently remove the heat spreader from them and replace the thermal interface with a more efficient one. But let's not get distracted by overclocking tricks, since the processor is not yet ready.

The final stage is the creation of electrical contacts that will connect the microprocessor with motherboard computer. Usually, tin cylinders are made for this, the so-called "legs" of the processor, which are first glued and then soldered to the substrate, where places are provided for them in advance. For microchips with a large number of bonds, small tin balls are sometimes used instead of legs, since they are stronger and more reliable, but recently they have been abandoned in favor of simple contact pads.

The finished microchip is washed in a solution of water with a solvent to remove excess flux and dirt, and then a final check of the quality of the work done is carried out. These can range from stress tests to performance in a clean room or more severe tests. For example, chips designed to operate in extreme conditions, such as in the space and military industries, are sealed in ceramic cases and are repeatedly tested at extreme temperatures in vacuum chambers.

Then, depending on the purpose of the microprocessor, it goes straight to the hands of buyers, and then to the sockets motherboards, or to other factories, where a small silicon crystal will take its place on the computer board of a video card, a space satellite, a smart refrigerator, or maybe it will fall into a smartphone case.

Processor manufacturing

The main chemical element used in the manufacture of processors is silicon, the most abundant element on earth after oxygen. It is the base component of coastal sand (silicon dioxide); however, in this form, it is not suitable for the manufacture of microcircuits. To use silicon as a material for making mi

cross-circuits, a lengthy technological process is required, which begins with the production of pure silicon crystals by the Czochralski method. According to this technology, raw materials, which are mainly used as quartz rock, are converted in electric arc furnaces into metallurgical silicon. Then, to remove impurities, the resulting silicon is melted, distilled and crystallized in the form of semiconductor ingots with a very high degree of purity (99.999999%). After mechanical cutting of the ingots, the resulting billets are loaded into quartz crucibles and placed in electric drying ovens for drawing crystals, where they are melted at temperatures exceeding 2500 ° Fahrenheit. In order to prevent the formation of impurities, drying ovens are usually installed on a thick concrete base. The concrete base, in turn, is mounted on shock absorbers, which can significantly reduce vibration, which can negatively affect crystal formation. Once the workpiece begins to melt, a small, slowly rotating seed crystal is placed in the molten silicon. As the seed crystal moves away from the surface of the melt, silicon filaments follow it, which, when solidified, form a crystalline structure. By varying the speed of movement of the seed crystal (10-40 mm per hour) and temperature (about 2500 ° Fahrenheit), we obtain a silicon crystal with a small initial diameter, which is then grown to the desired size. Depending on the size of the microcircuits manufactured, the grown crystal reaches 8-12 inches (20-30 mm) in diameter and 5 feet (about 1.5 m) in length.

The weight of the grown crystal reaches several hundred pounds. The workpiece is inserted into a 200mm diameter cylinder (current standard), often with a flat cut on one side for positioning and machining accuracy. Then each workpiece is cut with a diamond saw into more than a thousand circular substrates less than a millimeter thick (Figure 2). After that, the substrate is polished until its surface is mirror-smooth. The manufacture of microcircuits uses a process called photolithography. The technology of this process is as follows: layers of different materials are deposited on the semiconductor, which serves as the basis of the chip; thus, transistors, electronic circuits and conductors (tracks) are created through which signals propagate. At the intersection points of specific circuits, you can create a transistor or switch (valve). The photolithographic process begins with coating the substrate with a semiconductor layer with special additives, then this layer is covered with a photoresist chemical composition, and then the image of the microcircuit is projected onto the now light-sensitive surface. As a result of adding donor impurities to silicon (which, naturally, is a dielectric), a semiconductor is obtained. The projector uses a special photomask (mask), which is, in fact, a map of this particular layer of the microcircuit. (The Pentium III processor chip contains five layers; others modern processors may have six or more layers. When developing a new processor, it will be necessary to design a photomask for each layer of the microcircuit.) Passing through the first photomask, the light is focused on the surface of the substrate, leaving an imprint of the image of this layer. Then a special device moves the substrate somewhat, and the same photomask (mask) is used to print the next microcircuit. After the microcircuits are printed on the entire substrate, the caustic alkali will wash away the areas where the light affected the photoresist substance, leaving prints of the photomask (mask) of a particular layer of the microcircuit and interlayer connections (connections between layers), as well as signal paths. After that, another layer of semiconductor is applied to the substrate and again a little photoresist substance on top of it, then the next photomask (mask) is used to create the next layer of the microcircuit. In this way, layers are applied one on top of the other until the microcircuit is completely manufactured.

The final mask adds a so-called metallization layer used to connect all transistors and other components. Most microcircuits use aluminum for this layer, but recently copper has been used. For example, copper is used in the production of AMD processors at the factory in Dresden. This is due to the better conductivity of copper compared to aluminum. However, for the ubiquitous use of copper, it is necessary to solve the problem of its corrosion.

When the processing of the circular substrate is completed, the maximum possible number of microcircuits will be printed on it by the photo method. The microcircuit is usually in the form of a square or rectangle, along the edges of the substrate there are some "free" areas, although manufacturers try to use every square millimeter of the surface. The industry is going through another transition period in the production of microcircuits. Recently, there has been a tendency towards an increase in the diameter of the substrate and a decrease in the overall dimensions of the crystal, which is reflected in a decrease in the dimensions of individual circuits and transistors and the distance between them. In late 2001 and early 2002, there was a transition from 0.18 to 0.13 micron technology, replacing aluminum intercrystals with copper, and the diameter of the substrate increased from 200 mm (8 inches) to 300 mm (12 inches). Increasing the diameter of the substrate to 300 mm doubles the number of manufactured microcircuits. The use of 0.13-micron technology allows more transistors to be placed on the chip while maintaining its acceptable dimensions and a satisfactory percentage of product yields. This means that the trend towards an increase in the amount of cache memory embedded in the processor die continues. As an example of how this can affect the parameters of a particular microcircuit, consider the Pentium 4 processor.

The diameter of a standard substrate used in the semiconductor industry for many years is 200 mm, or approximately 8 inches (Fig). Thus, the substrate area reaches 31,416 mm2. The first version of the Pentium 4 processor, made on a 200mm substrate, contained a 0.18-micron Willamette core with aluminum pins located on a die with an area of ​​about 217mm2. The processor contained 42 million transistors. A 200 mm (8-inch) substrate could accommodate up to 145 of these microcircuits. The 0.13-micron Northwood Pentium 4 processors incorporate copper circuitry on a 131 mm2 die. This processor already contains 55 million transistors. Compared to the Willamette version, the Northwood core has twice the amount of on-board L2 cache (512KB), which explains the higher number of transistors contained. The use of 0.13-micron technology allows the die size to be reduced by about 60%, which makes it possible to accommodate up to 240 microcircuits on the same 200-mm (8-inch) substrate. As you remember, only 145 Willamette crystals could fit on this substrate. In early 2002, Intel began manufacturing Northwood chips on a larger, 300mm substrate with an area of ​​70,686mm2. The area of ​​this substrate is 2.25 times the area of ​​the 200 mm substrate, which makes it possible to practically double the number of microcircuits placed on it. If we talk about the Pentium 4 Northwood processor, then up to 540 microcircuits can be placed on a 300 mm substrate. The use of modern 0.13-micron technology in combination with a larger substrate has allowed more than 3.7 times the production of Pentium 4 processors. This is largely due to this fact that modern microcircuits are often cheaper than microcircuits. previous versions... In 2003, the semiconductor industry switched to 0.09 micron technology. When a new production line is introduced, not all chips on the substrate will be usable. But as the technology for the production of this microcircuit improves, the percentage of good (working) microcircuits, which is called the yield of good ones, will also increase. At the beginning of the release of new products, the yield may be below 50%, but by the time the release of this type of product is discontinued, it is already 90%. Most chip manufacturers hide real numbers yield of good ones, since knowledge of the actual relationship of fit to defective can be in the hands of their competitors. If a company has concrete data on how quickly its competitors' yield is increasing, it can adjust chip prices or plan production to increase its market share at a critical time. For example, during 1997 and 1998 AMD had low yields and lost significant market share. Although AMD made efforts to solve this problem, it still had to sign an agreement under which IBM Microelectronics was to manufacture and supply AMD with some of its own microprocessors. Upon completion of the processing of the substrate, a special device checks each microcircuit on it and marks the defective ones, which will later be rejected. The microcircuits are then cut from the substrate using a high-performance laser or diamond saw. When the crystals are cut from the substrates, each microcircuit is tested separately, packaged and tested again. The packaging process is called bonding: after the crystal is placed in the case, a special machine connects the crystal leads to the pins (or contacts) on the microcircuit case with tiny gold wires. Then the microcircuit is packed in a special bag - a container, which essentially protects it from the adverse effects of the external environment. After the pins of the crystal are connected to the pins on the body of the microcircuit, and the microcircuit is packaged, a final test is performed to determine correct operation and rated speed. Different microcircuits of the same series often have different speed. Special testing devices force each microcircuit to work in different conditions (at different pressures, temperatures and clock frequencies), determining the values ​​of the parameters at which the correct functioning of the microcircuit stops. In parallel, the maximum speed is determined; after that, the microcircuits are sorted by speed and distributed among the receivers: microcircuits with similar parameters fall into the same receiver. For example, microcircuits Pentium 4 2.0A, 2.2, 2.26, 2.24 and 2.53 GHz are the same microcircuit, i.e. they were all printed from the same photomask, in addition , they are made from the same workpiece, but at the end of the production cycle they were sorted by speed.

Processor production history

Any modern processor consists of a huge set of transistors that act as electronic microscopic switches. Unlike a conventional switch, transistors are capable of switching billions, even trillions of times per second. However, in order to achieve such a huge switching speed, it is necessary to reduce the size of these transistors. In addition, the performance of any processor is ultimately determined by the number of transistors themselves. That is why, since the creation of the first integrated microcircuit in 1959, the development of the industry went in the direction of reducing the size of transistors and at the same time increasing their density on the microcircuit.

When talking about predictions of an increase in the placement density and a decrease in the geometric dimensions of transistors, the so-called Moore's law is usually mentioned. It all began in 1965, three years before Gordon E. Moore co-founded Intel. At that distant time, the technology for the production of integrated microcircuits made it possible to integrate about three dozen transistors in one microcircuit, and a group of scientists headed by Gordon Moore was completing the development of new microcircuits that already combined 60 transistors. At the request of Electronics magazine, Gordon Moore wrote an article to mark the 35th anniversary of the publication. In this article, Moore was asked to predict how semiconductor devices will improve over the next 10 years. After analyzing the pace of development of semiconductor devices and economic factors over the past six years, Moore assumed that the number of transistors on a chip will double annually and by 1975 the number of transistors in one integrated circuit will be 65 thousand.

Of course, in 1965, neither Gordon Moore himself nor anyone else could have assumed that the published forecast for the next ten years would not only come true exactly, but would also serve as the basis for formulating a rule of thumb for the development of all semiconductor technology for many years to come. However, with Moore's prediction, not everything was going smoothly. By 1975, the growth in the number of elements in one microcircuit began to lag slightly behind the forecast. Then Gordon Moore adjusted the upgrade period to 24 months to compensate for the expected increase in semiconductor component complexity. In the late 1980s, another amendment was made by an Intel executive, and Moore's forecast was to double computing performance every 18 months (computing performance, measured in millions of instructions per second (MIPS), increases due to the increase in the number of transistors).

Until now, we have deliberately used the words "forecast" or "prediction" by Moore, but the expression "Moore's law" is more common in the literature. The fact is that after the publication of the aforementioned article in Electronics magazine, Professor Carver Mead, a colleague of Moore at the California Institute of Technology, gave this forecast the name "Moore's Law" and it stuck.

Why downsize transistors?

Reducing the size of the transistors reduces the die area, and hence the heat dissipation, and the thinner gate allows you to apply less voltage for switching, which also reduces power consumption and heat dissipation.

If the length of the gate of the transistor decreases by a factor of M, then the operating voltage of the gate decreases by the same amount. In addition, the speed of the transistor increases by a factor of M and the density of the placement of transistors on the crystal increases quadratically, and the power dissipation decreases by a factor of M.

For a long time, shrinking transistors has been the most obvious way to increase processor performance. In practice, this was not so easy to implement, but it was even more difficult to come up with such a processor structure so that its pipeline worked with maximum efficiency.

Negative Factors of Reducing the Size of Transistors

In recent years, the “gigahertz race” has begun to subside noticeably. This is due to the fact that, starting with the size of transistors 90 nm, all sorts of previously not so strongly perceptible negative factors began to manifest themselves strongly: leakage currents, a large scatter of parameters and an exponential increase in heat release. Let's figure it out in order.

There are two leakage currents: gate leakage current and subthreshold leakage. The first is caused by the spontaneous movement of electrons between the silicon substrate of the channel and the polysilicon gate. The second is the spontaneous movement of electrons from the source of the transistor to the drain. Both of these effects lead to the fact that you have to raise the supply voltage to control the currents in the transistor, and this negatively affects the heat dissipation. So, by reducing the size of the transistor, we, first of all, reduce its gate and the dielectric layer, which is a natural barrier between the gate and the channel. On the one hand, this improves the speed of the transistor (switching time), but on the other hand, it increases the leakage. That is, it turns out a kind of vicious circle. So the transition to a thinner technological process is another decrease in the thickness of the dioxide layer, and at the same time an increase in leaks. The fight against leaks is, again, an increase in control voltages, and, accordingly, a significant increase in heat generation.

One of the solutions is the use of SOI (silicon on insulator) technology, which AMD has implemented in its 64-bit processors. However, it cost her a lot of effort and overcoming a large number of associated difficulties. But the technology itself provides a huge number of advantages with a relatively small number of disadvantages. The essence of the technology, in general, is quite logical - the transistor is separated from the silicon substrate by another thin layer of insulator. There are many advantages. No uncontrolled movement of electrons under the channel of the transistor, which affects its electrical characteristics - this time. After the supply of the unlocking current to the gate, the time for ionization of the channel to the operating state (until the moment when the operating current flows through it) is reduced, that is, the second key parameter of the transistor performance improves, the time of its on / off is two. Or, at the same speed, you can simply lower the unlocking current - that's three. Or find some kind of compromise between increasing the speed of work and decreasing the voltage. While maintaining the same firing current, the increase in transistor performance can be up to 30%. If the frequency is left the same, the energy saving can be up to 50%. Finally, the characteristics of the channel become more predictable, and the transistor itself becomes more resistant to random errors, such as those caused by cosmic particles, falling into the channel's substrate and unpredictably ionizing it. Now, getting into the substrate located under the insulator layer, they do not affect the operation of the transistor in any way. The only drawback of SOI is that it is necessary to reduce the depth of the source / drain region, which directly and directly affects the increase in its resistance as the thickness decreases.

The function of a barrier for electrons, preventing leakage of the gate current, was performed by a thin layer of silicon dioxide, an insulator, located between the gate and the channel. Obviously, the thicker this layer, the better it performs its insulating function. But it is an integral part of the channel, and it is no less obvious that if we are going to reduce the length of the channel (the size of the transistor), then we need to reduce its thickness, and at a very fast pace. Over the past several decades, the thickness of this layer has averaged about 1/45 of the entire length of the channel. But this process has its own physical limitation - the minimum layer thickness should be about 1 nm, otherwise the leakage of the gate current will simply acquire unrealistic values.

Until recently, the material from which the gate was made was polycrystalline silicon (polysilicon). Polysilicon is a high-purity silicon with an impurity content of less than 0.01%, consisting of a large number of small crystalline grains oriented randomly relative to each other. Polysilicon is a raw material for the production of a more advanced type of silicon - monosilicon, and can also be used in its pure form along with monosilicon in some areas of application (for example, in the production of solar modules).

Monosilicon differs from polycrystalline modification in that its crystal structure is oriented in a certain crystallographic plane.

The situation changed when, instead of polysilicon, a combination of new materials began to be used for the manufacture of the gate, and instead of silicon oxide, a High-k dielectric, based on an impurity of tetravalent hafnium, was used as the gate dielectric. Table 14.1. the stages of development of the technological process of production of microcircuits are presented.

Table 14.1. Improvement of the technological process

Putting into production
Technical process
Plate size (mm.)
Connections
Shutter dielectric
Shutter material	Polysilicon	Polysilicon	Polysilicon	Polysilicon	Polysilicon